Analog/Mixed-Signal Research Group
Analog / Mixed-Signal Research Group
High-Speed I/O, Data Converters, Embedded Machine Learning
AMSG NEWS
Jeries wins Best Poster Award at NVMTS 2025
Great news! Jeries won the Best Poster Award at IEEE Non-Volatile Memory Technology Symposium (NVMTS) 2025 for our work: “Reconfigurable Time-Domain In-Memory Computing Macro using CAM FeFET in 28nm CMOS” This recognition highlights the exciting potential of time-domain in-memory computing using ferroelectric FETs. Well done, Jeries — looking forward to what comes next!
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Jeries’ abstract accepted to IEEE NVMTS 2025
Great news! Jeries’ abstract ““A FeFET CAM-Based Time-Domain In-Memory Computing Macro with 550 ps Delay Step in 28 nm CMOS” was accepted to the IEEE Nonvolatile Memory Technology Symposium (NVMTS) to be held in Georgia Tech on September 29th. Congrats Jeries and collaborators!
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Paper accepted to IEEE OJ-SSCS
Great news! Our paper “Fast-Locking and High-Resolution DLL with Binary Search and Clock Failure Detection for Wide Frequency Ranges in 3-nm FinFET CMOS” was accepted for publication at the IEEE Open Journal of the Solid-State Circuits Society.
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Salma and Luna’s undergrad project, supervised by Jeries win 2nd place in ECE Faculty project contest !
Congrats to Luna, Salma and Jeries for the 2nd place in the ECE Faculty annual project contest! What a great achievement! Link to the article and video
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Dima Ali Saleh wins outstanding TA award
Great news! Dima has been awarded the outstanding TA award! Congratulations Dima!
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Jeries Matar wins the 2025 ACRC Prize for M.Sc. students
Great news–Jeries has been awarded with the 2025 ACRC Prize for M.Sc. students! Well done Jeries!
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Jeries’ abstract has been accepted to IEEE DRC 2025 and is nominated to Best Student Oral Presentation Award
Great news! Jeries’ abstract “FeFET-Based Time-Domain In-Memory Computing Macro with Tunable Delay Calibration“ has been accepted to the IEEE Device Research Conference (DRC) 2025 and is nominated to Best Student Oral Presentation Award! Well done Jeries!
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AMSG participation in the ACRC Retreat 2025 at Ein Gedi
Last week, we participated in the ACRC retreat 2025 at Ein Gedi. The ACRC retreat brings together academia and industry in the area of advanced circuits and architectures for VLSI. The main topics of this year’s retreat were AI hardware and hardware security. Dr. Nicolás Wainstein presented a talk about “Breaking AI Hardware Bottlenecks: High-Efficiency… Continue Reading AMSG participation in the ACRC Retreat 2025 at Ein Gedi
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3rd Tape Out at AMSG
Great news! We have successfully taped out a Y-flash memory array prototype using Tower 180 nm process.
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