Research Areas
Our research advances next-generation AI hardware by bridging device, circuit, and system innovations in analog/mixed-signal computing, in-memory architectures, and ultra-high-speed interconnects.
We investigate the potential of mixed-signal computing techniques for modern artificial neural networks (ANN) architectures, which are typically limited by memory access, using CMOS and beyond-CMOS devices.
We investigate various aspects of wireline links, with emphasis on energy-efficient serial (SerDes) and parallel links (like DRR and die-to-die).
Clocking in VLSI
Credit: DALE-3
Our research span a broad spectrum of data converters. From low-power data converters for AI/ML hardware accelerators to ultra high-speed data converters for high-speed IO.
Clocking in VLSI
Credit: DALE-3
Phase-Locked Loop (PLL), Delay-Locked Loop (DLL), clock distribution networks, and other aspects of clocking systems.