Our research focuses on analog/mixed-signal integrated circuit (IC) design, with an emphasis on high-speed wireline, mixed-signal-based embedded machine learning, and cryogenic CMOS-based circuits for quantum computing signal conditioning and readout. Particularly, in the next few years we will focus on the following topics:

  1. High-speed wireline communications. The emergence of cloud computing, machine learning, and artificial intelligence is gradually saturating network workloads, demanding a rapid growth in datacenter bandwidth, which doubles every 3-4 years. Hence, there is a need for new electrical interfaces that can cope with the required ultra-high bandwidths. This research will explore various aspects of wireline interfaces spanning, clock generation, clock & data recovery, transmitters/receivers, data converters, and equalization with particular emphasis on ultra-high data rates and low power interfaces. Furthermore, this research will explore the integration of photonics with CMOS (i.e., silicon photonics).
  2. Mixed-signal computing for neural networks. Modern deep neural networks (DNNs) require billions of multiply-accumulate (MAC) operations per inference. Analog computing is rising as a feasible option for MAC operations as they demand relatively low precision, while being more efficient than digital computing in the low signal-to-noise ratio (SNR) regime.  This research will investigate the potential of mixed-signal computing techniques for modern DNN architectures, which are typically limited by memory access, using CMOS and beyond-CMOS components.
  3. Cryogenic CMOS for quantum computing. Quantum computing has the potential to create a paradigm shift in computing. Among the several implementations of qubits for quantum computers, semiconductor-based quantum computing, especially using CMOS technologies, is promising because it can be used to implement large arrays of qubits with their control and readout circuitry on a single chip. Hot qubits, based on quantum dots, can work at 4 K, easing the power budget, size, and complexity of the cryocooling system. This research will focus on exploring reliable quantum-to-classic-electronics (control and readout circuits) to tackle the challenges that prevent the large-scale integration of qubits.