Jeries Mattar’s paper accepted to IEEE TCAS I

Great news! Jeries‘ paper got accepted to IEEE Transactions on Circuits and Systems I: Regular Papers.

In this work, we present a reconfigurable time-domain in-memory computing (TD-IMC) macro that combines FeFET-based CAM with multilevel delay calibration in 28 nm CMOS, pushing toward compact and energy-efficient AI hardware.

Link to the preprint: https://lnkd.in/dwKsBqAd

Great collaboration with GlobalFoundries team (Halid Mulaosmanovic, Sven Beyer, Gunda Beernink, Stefan Dünkel) and Yalon’s group at the Technion (Eilam Yalon and Mor Dahan).