Yinon Geva received his B.Sc. degree in Electrical and Computer Engineering from the Technion in 2024. He is currently an M.Sc. student at the ECE Faculty at the Technion. He is also a full-time digital IP design engineer at Intel, specializing in design-for-testability (DFT). Yinon’s research focuses on high-speed, low-power die-to-die interfaces for chiplet-based systems, with an emphasis on CMOS circuit design, tapeout, and silicon measurement. His research interests include mixed-signal circuit design and architectural considerations for short-reach interconnects.

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